1. Field of the Invention
This invention relates to measurement techniques, and more particularly to measuring equivalent series resistance of capacitors. This invention further relates to selecting decoupling components for power distribution systems.
2. Description of the Related Art
Electronic systems typically employ several different types of electrical interconnecting apparatus having planar layers of electrically conductive material (i.e., planar conductors) separated by dielectric layers. A portion of the conductive layers may be patterned to form electrically conductive signal lines or "traces". Conductive traces in different layers (i.e., on different levels) are typically connected using contact structures formed in openings in the dielectric layers (i.e., vias). For example, integrated circuits typically have several layers of conductive traces which interconnect electronic devices formed upon and within a semiconductor substrate. Each layer is separated from adjacent layers by dielectric layers. Within a semiconductor device package, several layers of conductive traces separated by dielectric layers may be used to electrically connect bonding pads of an integrated circuit to terminals (e.g., pins or leads) of the device package. Printed circuit boards (PCBs) also typically have several layers of conductive traces separated by dielectric layers. The conductive traces are used to electrically interconnect terminals of electronic devices mounted upon the PCB.
Signals in digital electronic systems typically carry information by alternating between two voltage levels (i.e., a low voltage level and a high voltage level). A digital signal cannot transition instantaneously from the low voltage level to the high voltage level, or vice versa. The finite amount of time during which a digital signal transitions from the low voltage level to the high voltage level is called the rise time of the signal. Similarly, the finite amount of time during which a digital signal transitions from the high voltage level to the low voltage level is called the fall time of the signal.
Digital electronic systems are continually being produced which operate at higher signal frequencies (i.e., higher speeds). For the digital signals within such systems to remain stable for appreciable periods of time between transitions, the rise and fall times of the signals must decrease as signal frequencies increase. This decrease in signal transition times (i.e., rise and fall times) creates several problems within digital electronic systems, including signal degradation due to reflections, power supply "droop", ground "bounce", and increased electromagnetic emissions. It is desirable that the digital signals are transmitted and received within accepted tolerances.
A signal launched from a source end of a conductive trace suffers degradation when a portion of the signal reflected from a load end of the trace arrives at the source end after the transition is complete (i.e., after the rise time or fall time of the signal). A portion of the signal is reflected back from the load end of the trace when the input impedance of the load does not match the characteristic impedance of the trace. When the length of a conductive trace is greater than the rise time divided by three, the effects of reflections upon signal integrity (i.e., transmission line effects) should be considered. If necessary, steps should be taken to minimize the degradations of signals conveyed upon the trace due to reflections. The act of altering impedances at the source or load ends of the trace in order to reduce signal reflections is referred to as "terminating" the trace. For example, the input impedance of the load may be altered to match the characteristic impedance of the trace in order to prevent signal reflection. As the transition time (i.e., the rise or fall time) of the signal decreases, so does the length of trace which must be terminated in order to reduce signal degradation.
All conductors have a certain amount of inductance. The voltage across the inductance portion of a conductor is directly proportional to the rate of change of current through the conductor. At the high frequencies present in conductors carrying digital signals having short transition times, a significant voltage drop occurs across a conductor having even a small inductance. A power supply conductor connects one terminal of an electrical power supply to a power supply terminal of a device, and a ground conductor connects a ground terminal of the power supply to a ground terminal of the device. When the device generates a digital signal having short transition times, high frequency transient load currents flow in the power supply and ground conductors. Power supply droop is the term used to describe the decrease in voltage at the power supply terminal of the device due to the flow of transient load current through the inductance portion of the power supply conductor. Similarly, ground bounce is the term used to describe the increase in voltage at the ground terminal of the device due to the flow of transient load current through the inductance portion of the ground conductor. When the device generates several digital signals having short transition times simultaneously, the power supply droop and ground bounce effects can be additive. Sufficient power supply droop and ground bounce can cause the device to fail to function correctly.
Power supply droop is commonly reduced by arranging power supply conductors to form a crisscross network of intersecting power supply conductors (i.e., a power supply grid). Such a grid network has a lower inductance, hence power supply droop is reduced. A continuous power supply plane may also be provided which has an even lower inductance than a grid network. Placing a "bypass" capacitor near the power supply terminal of the device is also used to reduce power supply droop. The bypass capacitor supplies a substantial amount of the transient load current, thereby reducing the amount of transient load current flowing through the power supply conductor. Ground bounce is reduced by using a low inductance ground conductor grid network, or a continuous ground plane having an even lower amount of inductance. Power supply and ground grids or planes are commonly placed in close proximity to one another in order to further reduce the inductances of the grids or planes.
FIG. 1 is a perspective view of a power distribution system 100 comprising a pair of 10 in..times.10 in. square conductive planes 110 and 120 separated by a fiberglass-epoxy composite dielectric layer. Each conductive plane is made of copper and is 0.0014 in. thick. The fiberglass-epoxy composite layer separating the planes has a dielectric constant of 4.0 and is 0.004 in. thick. The electrical impedance between the parallel conductive planes of FIG. 1 varies widely at frequencies above about 200 MHz. The parallel conductive planes exhibit multiple electrical resonances at frequencies between 100 MHz and 1 GHz and above, resulting in alternating high and low impedance values and leading to a varying voltage 130. The parallel conductive planes 110 and 120 of FIG. 1 would also radiate substantial amounts of electromagnetic interference (EMI) at frequencies associated with high electrical impedance between the planes anywhere near their peripheries.
The above problems are currently solved in different ways at different frequency ranges. At low frequency, the power supply uses a negative feedback loop to reduce fluctuations. At higher frequencies, large value bypass (i.e. decoupling) capacitors are placed near devices. At the highest frequencies, very small bypass capacitors are placed very close to devices in an attempt to reduce their parasitic inductance, and thus high frequency impedance, to a minimum value.
The parameters of particular interest in selecting decoupling capacitors are the magnitude of the impedance minimum of each decoupling capacitor as a function of frequency [referred to as the equivalent series resistance (ESR)], and the frequency at which the ESR occurs [referred to as the resonance frequency]. The accurate measurement of ESR for capacitors is paramount in deciding the number of capacitors to be used on high-speed electronic circuit boards to reduce noise on power distribution system power planes. The total number of capacitors is also used by board designers to achieve an overall maximum, or target, impedance for the board, often as a function of frequency.
Accuracy in measuring the ESR can directly impact the cost of manufacturing the PCB. High ESR estimates will overpredict the number of capacitors needed, thus significantly reducing the board space. Using too many capacitors also increases the cost of manufacturing the PCB. Low ESR estimates will underpredict the number of capacitors to be mounted in the power distribution system. Too few capacitors may lower the reliability of the PCB. If the uncertainty in the ESR is high, extra capacitors may have to be added to ensure the reliability of the PCB, again also increasing the cost of manufacturing.
Choosing the needed decoupling for the power distribution system may be obtained using a model for the power distribution system as shown in FIG. 2. A switching power supply 210 supplies current and voltage to a CMOS chip load 220. In parallel with the power supply 210 and the load 220 are decoupling capacitors 215, [shown with inductive L, capacitive C, and resistive R components] and the PCB 225 itself, with its own capacitance. Modeling a constant current of one ampere through the power supply 210 permits changes in the impedance as a function of frequency to be identified by changes in the voltage across the power supply 210. Determining the proper values for decoupling capacitors and the optimum number of each has been a "trial and error" process, which relies on the experience of the designer. There have been no known straightforward rules for choosing decoupling capacitors for all frequency ranges.
Currently, the industry and capacitor manufacturers use a procedure to measure the ESR of capacitors that is given in the operating manual of the HEWLETT PACKARD HP 4291A RF Impedance/Material Analyzer. One set-up using the HP 4291A is shown in FIG. 3. Prior art measuring system 300 comprises the HP 4291A mainframe 310 connected to a test station 320, which includes a support 324. A test head with an APC-7 connector 325 attaches to the test station 320. A test fixture 331, preferably an HP 16192C, may be screwed onto the test station 320 at support 324 and connects electrically to the test head APC-7 connector 325 through APC-7 connector 326.
The test fixture 331 includes outer electrodes 340A and 340C and inner electrode 340B for electrically connecting a device under test (DUT) 360 into the measuring system 300 through leads 361A and 361B. When a DUT (i.e. a capacitor) 360 is placed in position to have its impedance measured, lead 361A is placed in contact with outer electrode 340A and lead 361B is placed in contact with inner electrode 340B. Arms 365A and 365B are moved inward to mechanically secure the capacitor 360 in place. Other test fixtures 331 include springs or spring clips instead of arms 365A and 365B to mechanically secure the capacitor 360 in place during measurement. Compensation must be made in most cases for OPEN/SHORT circuit and electrical lengths.
Problems may arise when attempting to measure the ESR of capacitors above about 10 .mu.F. These capacitors typically have ESRs in the range .about.10-20 m.OMEGA.. This extremely low range for the ESR measurements often brings the accuracy and/or precision of the measuring device into question.
It has been determined by the present inventors that there are problems with reproducibility when using the industry standard procedure for measuring the ESR of capacitors, including measurement errors of 15% or more. The present inventors have determined that the electrical connection between the capacitor and the test head may account for the large uncertainty in the ESR measurements. It would thus be desirable to have a system and method for measuring more accurately the ESR of capacitors to be used for decoupling power distribution systems. The method is preferably compatible with established measurement devices, such as the HEWLETT PACKARD HP 4291A RF Impedance/Material Analyzer. It would further be desirable to integrate the method for more accurately measuring the ESR into a method for designing the power distribution system and determining the desired decoupling components for stabilizing the electrical impedance in the power distribution system. The method is preferably automatable, to the extent possible, using a computer system to perform calculations.